Chapter 9: The Memory Miracle

In one paragraph

In 1947, Manchester’s Williams tube showed how fragile stored-program memory could be, while mercury delay lines sent data as shock-waves through mercury. MIT’s Project Whirlwind needed memory that did not forget. Jay Forrester’s three-dimensional coincident-current concept used drifting neon glow tubes, then shifted to magnetic materials with rectangular hysteresis. Three inventors — Forrester, Jan Rajchman, An Wang — converged on magnetic-core memory between 1949 and 1953. SAGE turned MIT’s variant into the IBM 704’s industrial standard.

Cast of characters

Name	Lifespan	Role
Jay W. Forrester	1918–2016	Director, MIT Digital Computer Laboratory (1946–1951); led Project Whirlwind and the SAGE memory effort; conceived the 3D coincident-current store in 1947 and switched to magnetic materials in 1949.
Frederic C. Williams	1911–1977	Professor of Electrical Engineering, University of Manchester; co-author of the September 1948 Nature Letter that announced a working stored-program experimental machine using the Williams-tube electrostatic CRT memory.
Tom Kilburn	1921–2001	Manchester researcher under Williams; author of the December 1, 1947 internal report “A Storage System for Use with Binary Digital Computing Machines” — the chapter’s primary anchor for Williams-tube operating limits.
Jan A. Rajchman	1911–1989	RCA Laboratories (Camden NJ); developed the Selectron tube (1946–1947); pursued ferrite-core matrix memory in parallel with Forrester.
An Wang	1920–1990	Research fellow at Harvard’s Computation Laboratory under Howard Aiken; filed US Patent 2,708,722 (“Pulse Transfer Controlling Device”) on October 21, 1949, eighteen months before Forrester’s filing.
Kenneth H. “Ken” Olsen	1926–2011	MIT research assistant under Norman Taylor; co-builder of the Memory Test Computer that validated coincident-current core memory at scale before transplanting it into Whirlwind.

Timeline (1944–1956)

timeline
    title From the Williams Tube to the IBM 704
    Late 1944 : Forrester accepts the Navy aircraft stability-and-control analyzer project ; analog approach pursued through 1945
    1946 : Project pivots from analog to serial digital with Perry Crawford ; Special Devices Center merges into the Office of Naval Research
    1947 : Forrester arrives at the 3D coincident-current concept using neon glow-discharge tubes ; tests fail to scale
    Dec 1 1947 : Kilburn signs the internal report on Williams-tube limits — 0.2-second retention, more than 5-Hz refresh required
    Sep 25 1948 : Williams and Kilburn publish 'Electronic Digital Computers' as a Letter in Nature 162 p. 487
    1949 : Forrester sees magazine ads for rectangular-hysteresis magnetic materials and replaces the glow tubes
    Oct 21 1949 : An Wang files US Patent 2,708,722 'Pulse Transfer Controlling Device' at Harvard's Computation Laboratory
    Jan 1951 : Forrester publishes 'Digital Information Storage in Three Dimensions Using Magnetic Cores' in J. Appl. Phys. 22(1)
    May 11 1951 : Forrester files US Patent 2,736,880 'Multicoordinate Digital Information Storage Device' (assigned to Research Corporation)
    1951 : Whirlwind I becomes operational with Williams-tube storage
    Summer 1953 : Whirlwind upgraded to a 32x32x16-bit core array — cycle time roughly 9 microseconds vs the displaced 25
    Oct 1953 : Rajchman publishes 'A Myriabit Magnetic-Core Matrix Memory' in Proc. IRE 41(10)
    1954 : IBM 704 announced — first IBM mainframe with magnetic-core memory standard
    May 17 1955 : Wang's patent 2,708,722 issues
    1956 : IBM purchases Wang's patent for approximately 500,000 dollars ; Forrester's patent 2,736,880 issues on Feb 28

Plain-words glossary

• Williams tube — An electrostatic memory that stored binary digits as a charge pattern on the inner phosphor screen of a commercial cathode-ray tube. Fast random access but volatile, requiring constant refresh.
• Mercury delay line — A serial memory in which a bit travelled as an acoustic shock-wave down a roughly one-metre tube of mercury, was sensed at the far end, and was reinjected to keep the bit alive. Robust but slow; access time was set by waiting for a specific bit to emerge from the tube.
• Rectangular hysteresis loop — A magnetic material’s response curve in which magnetisation snaps cleanly between two saturation states with a sharp threshold between them. The “rectangular” shape — almost no intermediate response — is what made coincident-current selection trustworthy.
• Coincident-current selection — The addressing trick at the heart of magnetic-core memory: each coordinate line carries only half the current needed to switch a core, so only the core at the intersection of two activated lines flips. Half-selected cores along the same row or column remain unchanged.
• Magnetic-core memory — A non-volatile random-access memory built from a 3D grid of small ferrite rings (cores), each holding one bit by its magnetisation direction. Reading the bit destroys it, so every read is followed by a rewrite — Wang’s 1949 pulse-transfer patent solved that cycle.
• Project Whirlwind / SAGE — Whirlwind was MIT’s real-time digital-computer project, which by 1949 had pivoted from a Navy flight simulator toward Air Force air-defence work. SAGE — the Semi-Automatic Ground Environment — became the production air-defence network that funded the industrial scale-up of magnetic-core memory and routed the technology to IBM.
• Memory Test Computer — A purpose-built MIT machine, built by Norman Taylor and Ken Olsen out of existing digital test equipment, that validated coincident-current core memory at full system scale before it was transplanted into Whirlwind in summer 1953.

The von Neumann stored-program architecture, detailed in previous chapters, was a brilliant logical construct that solved the problem of machine configuration. On paper, it assumed the existence of a memory substrate that could hold instructions and data reliably and without forgetting them. But when the architecture was first realized in hardware, that assumption collided with physical reality. The earliest machines were amnesiacs.

That weakness mattered because the stored-program idea had moved the center of gravity inside the machine. Configuration was no longer merely external setup; a stored-program machine put its instructions into the same physical store as numbers. If that store drifted, the machine did not merely lose an answer; it could lose the instructions by which it knew what operation to perform next. Memory was no longer a passive cabinet attached to calculation. It was the condition that made the architecture real.

The machine widely recognized as demonstrating the stored-program architecture in practice was operating at the Royal Society Computing Machine Laboratory at the University of Manchester by mid-1948. Reported in a September 1948 letter to Nature by F. C. Williams and T. Kilburn, the rig was an undeniable milestone. However, its authors were forthright about its limitations, describing the machine in their first paragraph as “purely experimental, and is on too small a scale to be of mathematical value.” They noted that it was “built primarily to test the soundness of the storage principle employed.”

That storage principle was the Williams-tube electrostatic cathode-ray tube (CRT) memory. It used the inner phosphor screen of a commercial CRT to store a charge pattern representing binary digits. As an operating substrate, it was brutally fragile. A December 1947 internal report by T. Kilburn, approved by Williams, laid out the operational limits in unsparing terms. The Williams tube possessed a short-term retention “of the order of 0.2 seconds,” a brief grace period provided passively “by the insulating properties of the screen material.”

For a program to survive longer than a fraction of a second, the machine had to constantly read and rewrite its own memory. The 1947 Kilburn report specified that maintaining long-term storage required “regenerating the charge pattern at a frequency greater than 5 cycles/second.” A hypothetical machine running this storage in series mode, the report calculated, could “set up and obey” an instruction in 600 microseconds. The report also explored candidate storage encoding mechanisms, including dot-dash display, dash-dot display, defocus-focus display, focus-defocus display, and anticipation.

Those encoding schemes are worth pausing over because they show the experimental state of the substrate. Kilburn was not describing a settled component to be dropped into an engineering design. He was comparing ways to make a visible electrical trace on a cathode-ray screen stand for a stable binary state. The names themselves, dot-dash and defocus-focus, reveal how close the memory still was to laboratory instrumentation. The bit had to be made visible, sensed, refreshed, and trusted again before the next decay interval expired.

A machine whose memory decays in 0.2 seconds is not a stored-program architecture in any practical operational sense; it is a delicate circuit regenerating its own memory hundreds of times a minute, trusting that every cycle is faithful.

The contemporary alternative was the mercury acoustic delay line. This relied on shock-wave propagation through a column of mercury. Jay W. Forrester, in a 1994 oral history conducted by the Concord Free Public Library, recalled the characteristics of the delay line: a tube approximately one meter long with a transit time of about one millisecond. The storage capacity was, in his recollection, “maybe something like a thousand of these shocks that were either present or absent in the tube traveling down the tube.” Because it was serial storage, the access time was dictated by the worst-case wait for a specific bit to emerge from the far end. Forrester summarized the trade-off: “It worked. But it was slow.”

Faced with these options, builders often chose the Williams tube for its faster access speeds, despite its volatility. Yet Forrester would later characterize the electrostatic CRT memory that his own project originally used as “expensive and short-lived and not very reliable.” The infrastructure cost of running real programs on hardware that forgot them was immense.

Delay lines and Williams tubes therefore failed in opposite ways. The delay line remembered by making time into a loop: the bit existed as an acoustic event circulating through mercury, and the machine waited for the event to return. The Williams tube gave faster random access, but only by accepting a storage surface that was continually slipping away from the machine. Between them lay the central engineering dilemma of the late 1940s. A useful computer needed memory that was both addressable and durable. The available devices tended to offer one virtue by sacrificing the other.

Project Whirlwind’s Memory Crisis

The fragility of electrostatic and delay-line memory was a frustrating constraint for scientific computation, but it was an existential threat for engineers attempting to build real-time control systems. This distinction between batch processing and continuous control defined the crisis that enveloped Project Whirlwind at the Massachusetts Institute of Technology, fundamentally changing the trajectory of computer memory.

Project Whirlwind began in late 1944 under the sponsorship of the US Navy Special Devices Center. The original objective was to build an analog aircraft stability and control analyzer. According to Forrester’s 1994 oral history, the team pursued an analog approach through 1945, but concluded it “was not going to be satisfactory.” In roughly 1946, through conversations with Perry Crawford of the Special Devices Center—who actively kept people focused on the possibilities of digital computers—the project shifted to a serial digital architecture.

The setting was not a general-purpose computer laboratory looking for an elegant machine. It was an engineering project asked to model aircraft behavior quickly enough to matter for control. Forrester later placed the early laboratory at 211 Massachusetts Avenue, across from the Necco factory, and remembered Crawford as a sponsor who moved freely among projects to keep attention on digital computing. That institutional origin helps explain why Whirlwind’s memory problem felt different from Manchester’s. The question was not whether a stored program could be demonstrated. The question was whether a digital machine could stay synchronized with a world that would not pause while its memory recovered.

By 1948, the scope of what a real-time digital computer might achieve had expanded. Forrester recalled that the team had “written two memoranda about the possibility of the digital computer handling the combat information flow in a naval task force,” proposing the integration of operational data into centralized combat information centers.

The geopolitical landscape accelerated this shift. The Soviet Union’s atomic bomb test in August 1949 catalyzed an air-defense study known as Project Charles. George Valley, an MIT associate professor of physics and Air Force consultant, helped bring Forrester into this conversation. Along with Robert R. Everett, Forrester’s primary deputy, the team demonstrated a Whirlwind-based intercept-direction concept that ultimately pulled the effort into the Cold War air-defense trajectory that would become the SAGE system.

This was a chain of institutional escalation: a Navy-sponsored simulator became a digital control project; the digital control project became a proposal for combat information centers; the atomic-bomb test turned air defense into an urgent national problem; and Project Charles made Whirlwind a candidate architecture for that problem. None of those steps makes magnetic core inevitable. They do explain why MIT had a project willing to spend years on a memory technology that, at first, was only a difficult laboratory possibility.

This transition from flight simulator to air-defense network meant memory volatility was no longer just an annoyance; it was a project-killing problem. Forrester explicitly contrasted Whirlwind’s reliability emphasis with the era’s other digital computer projects, noting that they “were devoted to scientific computation where if the machine stopped working, you could begin over or do the job tomorrow.” An air-defense control loop could not be restarted tomorrow.

The available memory technologies offered no guarantees. Forrester recalled the era as one of profound constraint: “people were desperate for memory for computers. All kinds of things were being tried.” The desperation reached such a pitch that the team entertained architectural solutions that sound absurd in retrospect but were entirely rational given the alternatives. Forrester recounted that they “seriously considered renting a television link from Boston to Buffalo and back so that we could store binary digits in the transit time that it would take to make the round-trip on the television channel.”

The Boston-to-Buffalo idea is best read not as comic relief but as an engineering measurement. If one could not buy a satisfactory memory device, perhaps one could rent a communication path and use propagation delay as storage. The proposal stretched the logic of the mercury delay line across geography: send the bit away, wait for it to come back, and treat the round trip as a memory interval. It was a poor answer, but it located the problem exactly. The machine needed a physical phenomenon that could hold a binary distinction long enough, and cleanly enough, for computation to proceed.

While Whirlwind I became operational in 1951, utilizing Williams-tube storage, the memory remained a severe bottleneck. To fulfill its mandate, the engineering team had to find a completely different physical substrate.

The Three-Dimensional Idea

The search for a robust memory led to the three-dimensional coincident-current magnetic core memory. While it eventually became the industrial standard, the architecture began as a logical structure in search of a viable material.

In his oral history, Forrester recalled that in about 1947 he began thinking about the geometry of storage: “if we had one-dimensional storage and two-dimensional storage, what’s the possibility of a three-dimensional storage.” He arrived at a logical structure that satisfied the requirements, but the initial physical implementation relied on neon glow-discharge tubes.

The appeal of the geometry was selectivity. A one-dimensional store required a long line or a serial stream. A two-dimensional matrix allowed one coordinate to select a row and another to select a column. A three-dimensional arrangement promised a still better scaling relation: more stored bits without a separate wire for every bit. If the memory grew by volume while the wiring grew by edge length, memory could scale without drowning the machine in connections.

The 1947 glow-tube concept already incorporated the key mechanism that would define magnetic core memory: coincident-current selection. As Forrester described it, “You could activate a wire say in the ‘x’ axis and another one crossing in the ‘y’ axis and only the glow tube at the intersection would have enough voltage on it to break down and begin to discharge.” The team conducted tests on individual units, but the physical reality of the glow tubes proved insurmountable. Their “characteristics … change with temperature and age,” Forrester recalled. This drift made them unsuitable for reliable long-term discrimination, so the team “didn’t really pursue it.”

The underlying logic survived the failed device. Coincident selection depends on a threshold. Each selected coordinate contributes only part of the force needed to change a state; only at the addressed intersection do the contributions add up to enough. Everywhere else, a half-selection must be harmless. This is why drift with temperature and age was fatal for glow tubes. If the threshold moved, a device that should have ignored a partial signal might switch, or a device that should have switched might not. Memory demanded not just a clever addressing scheme, but a material whose switching behavior could be counted on again and again.

The breakthrough occurred when Forrester found a material that matched the logical structure. In 1949, according to his recollection, he saw magazine advertisements for magnetic materials exhibiting a rectangular hysteresis loop—materials he recalled had been developed by the German army for tank-turret magnetic amplifiers during World War II. Recognizing that these magnetic materials could substitute for the unstable glow tubes, he shifted the project’s focus. He noted that “over a period of two or three months we developed how that could be done and then over the next three years or so, we in fact brought it to the point where it was a working, permanently reliable system.”

The technical case for this approach was formally introduced in January 1951, when Forrester published “Digital Information Storage in Three Dimensions Using Magnetic Cores” in the Journal of Applied Physics. The paper’s abstract laid out the stark performance differences between available materials. It noted that “tests show that most existing metallic magnetic materials switch in 20 to 10,000 microseconds and are too slow.” In contrast, it argued that “nonmetallic magnetic materials … switch in less than a microsecond.” The architecture Forrester proposed required “only one magnetic core per binary digit” and operated on a 2:1 magnetizing-force discrimination ratio.

That 2:1 ratio was the technical heart of the design. A current in one coordinate line alone had to remain below the switching threshold; simultaneous currents in the crossing lines had to exceed it. The selected core changed state, while the many half-selected cores on the same row or column remained unchanged. In practical terms, the array was a field of tiny magnetic decisions, each decision made only when two coordinates agreed on the same location. Compared with a mercury delay line’s waiting time or a Williams tube’s refresh burden, the claim that a nonmetallic magnetic material could switch in less than a microsecond was not a marginal improvement. It was the difference between memory as an unstable timing trick and memory as an addressable component.

On May 11, 1951, Forrester filed US Patent 2,736,880 for a “Multicoordinate Digital Information Storage Device,” assigned to Research Corporation. The patent specification explicitly required rings “of magnetic material, each having substantially rectangular hysteresis properties … the several rings being arranged in rows and columns.” It detailed a coincident-current mechanism relying on “the simultaneous (i.e. coincidental) application of two or more such currents” to switch a core’s state. It also highlighted the scaling advantages of a three-dimensional array, noting that it required only “3 ∛number of cores” input leads.

The patent did not issue until February 28, 1956. The delay matters for the narrative because the invention did not pass cleanly from one mind to one patent to one industry. By the time Forrester’s application became an issued patent, other claims to magnetic memory had already been filed, published, or absorbed into corporate strategy. The core-memory story is therefore not a priority race with a simple finish line. It is a convergence of mechanisms, materials, patents, and production channels.

The Patent War

The popular narrative often frames Forrester as the sole inventor of magnetic-core memory, but the historical record reveals a landscape of parallel invention. In the critical window between 1949 and 1953, three distinct paths toward magnetic-core memory were being pursued simultaneously.

At RCA Laboratories in Camden, New Jersey, Jan A. Rajchman had already established himself as a pioneer in memory technology. Between 1946 and 1947, he developed the Selectron tube, an electrostatic-storage tube capable of holding 256 bits that saw use in the JOHNNIAC computer at RAND. Following this, Rajchman began pursuing a coincident-current magnetic-core path in parallel with Forrester. Shaping his prototype ferrite cores using a converted aspirin-tablet press, Rajchman developed RCA’s matrix memory technology. This parallel track culminated in October 1953 with the publication of “A Myriabit Magnetic-Core Matrix Memory” in the Proceedings of the IRE, whose title used “myriabit” to describe the 10,000-bit matrix.

Rajchman’s route is important because it began from the same dissatisfaction with electrostatic storage but moved through a different institutional setting. RCA had deep experience with tubes, and the Selectron was an attempt to make a more sophisticated random-access electrostatic store. Its presence in the story prevents a false contrast between crude old tubes and elegant new cores. The competition was among serious memory technologies. Magnetic core won not because every alternative was foolish, but because the ferrite matrix gave engineers a better combination of persistence, access, and manufacturable scale.

Simultaneously, crucial work was underway at the Harvard Computation Laboratory. On October 21, 1949—eighteen months prior to Forrester’s patent filing—An Wang filed US Patent 2,708,722 for a “Pulse Transfer Controlling Device.” Wang’s patent, which would eventually issue on May 17, 1955, described a magnetic-core device that solved the critical write-after-read cycle, making coincident-current core RAM operationally viable. The patent specified the use of magnetic materials with a residual flux density “at least 0.4-0.5, preferably greater than 0.80” of saturation. It also noted that because the device “involves no mechanical movement … hence, its speed is not limited by mechanical considerations.” ¹

Wang’s claim cut at a different but equally practical part of the problem. A magnetic state could represent a bit, but a usable random-access memory also needed a reliable cycle for sensing and restoring that state. The patent language about residual flux density was not decorative physics. It specified how strongly the material should remember after the applied pulse ended. In a memory technology, remanence was the point: the device had to retain a distinction without continuous power or mechanical motion.

These parallel developments generated overlapping claims. The priority dispute appears not to have been resolved by a definitive judicial ruling in a patent court, but rather by the force of commercial licensing. A major commercial resolution came in 1956 when, according to widespread historical accounts, IBM purchased Wang’s patent for approximately 500,000 dollars. That transaction absorbed Wang’s foundational claims into IBM’s portfolio and helped settle the patent war commercially.

Commercialization

The industrial dominance of Forrester’s variant of magnetic-core memory did not arise from technical primacy alone. Instead, it was the result of MIT’s institutional pipeline. The technology matured within a military-funded ecosystem that provided an urgent use case, deep resources, and a direct path to massive industrial production.

That distinction matters. Forrester’s 1951 paper and patent described a powerful architecture; Wang’s 1949 filing addressed a key operating cycle; Rajchman’s RCA work demonstrated a parallel corporate push toward large matrices. What MIT possessed was a demanding system problem and a route from laboratory validation to procurement. Invention established claims. Whirlwind and SAGE established the production path.

Before magnetic-core memory could become an industrial standard, it had to be validated at scale. This crucial step was orchestrated by Norman Taylor, chief engineer at the MIT Digital Computer Laboratory, and Kenneth Olsen, a research assistant. They proposed building a dedicated Memory Test Computer utilizing the team’s existing digital test-equipment building blocks.

The proposal was a disciplined way to reduce risk. Rather than insert an unproven core memory directly into Whirlwind and hope the whole machine could be debugged at once, Taylor and Olsen isolated the memory problem in a machine built for testing. Forrester’s recollection that it was assembled from existing test equipment is significant. The laboratory had accumulated enough digital building blocks to make a special-purpose computer whose job was to prove whether the memory could behave as a system rather than as a promising single core on a bench.

Forrester, recalling the proposal, admitted his skepticism: “I must say I doubted that they could do it and certainly not in the nine months they said it would take, but they came very close.” The Memory Test Computer successfully proved that coincident-current magnetic-core arrays could function reliably at scale. With this validation, Forrester recalled, “within a couple of months after that, we moved it into the Whirlwind computer to replace the electrostatic storage tubes that we had been using for memory but which were expensive and short-lived and not very reliable.”

This is the hinge between invention and infrastructure. A material with a rectangular hysteresis loop was necessary, but not sufficient. The array had to be wired, driven, sensed, and incorporated into timing circuits. It had to survive repeated writes and reads without drifting like the glow tubes or demanding regeneration like the Williams tube. The Memory Test Computer turned core memory from a plausible device into an engineering subsystem.

Historical chronicles generally place this upgrade in the summer of 1953, noting that it introduced a 32×32×16-bit array—sixteen stacked planes containing 1,024 cores each. The performance improvement is widely cited to have dropped cycle times to approximately 9 microseconds, compared to roughly 25 microseconds for the displaced electrostatic system. These precise figures are scale markers rather than the firmest ground in the story. The firmer point is Forrester’s: the new memory replaced electrostatic tubes his team regarded as expensive, short-lived, and unreliable.

The manufacturing story also needs restraint. Retrospective accounts describe early arrays assembled under microscopes by workers with fine motor control, because the coincident-current architecture required an angled sense wire that resisted machine threading. Later summaries also describe a 1956 wiring improvement that reduced the time for threading the straight select lines on a 128×128 array from many hours to minutes. Those details convey the fabrication challenge, but they do not support importing the better-known Apollo-era core-rope labor story into the Whirlwind and IBM 704 period. The narrower claim is enough: core memory solved volatility by moving the difficulty into materials, wiring, and production technique.

With core memory proven on Whirlwind, MIT Lincoln Laboratory possessed the technological foundation necessary for the SAGE air-defense network. They needed a commercial partner capable of manufacturing the systems at unprecedented scale. According to Forrester, the laboratory sent requests “to a substantial number of companies, probably 15 or so.” After evaluating the responses, “it was clear that IBM was far ahead of any of the others as a possible company to do the work, so we recommended them to the Air Force.”

The resulting production SAGE computer, the IBM AN/FSQ-7, is widely described as a heavily modified version of the Whirlwind architecture. Forrester recalled that the SAGE network grew to encompass 30-some control centers across North America. Each center occupied a four-story building roughly 160 feet square and contained between 60,000 and 80,000 vacuum tubes. According to Forrester’s later recounting, the implementation of strict reliability protocols increased vacuum-tube life from roughly 500 hours to about 500,000 hours, allowing the centers to achieve an operational availability of roughly 99.8 percent.

Those numbers should stay attached to Forrester’s retrospective account of the system’s scale and reliability program. Still, the pattern is unmistakable. SAGE was not merely a larger Whirlwind. It was a production environment in which memory, logic, maintenance procedure, and manufacturing discipline had to work together. The same project that demanded reliable memory also demanded a reliability culture around the rest of the machine. Core memory was one part of that larger conversion from experimental digital computing to operational infrastructure.

“By 1956,” Forrester noted, “the SAGE air defense system was essentially cast in its direction. The first of 30-some computer centers was nearing completion in New Jersey.” The SAGE program effectively underwrote the industrialization of magnetic-core memory.

This military investment quickly produced commercial dividends. Secondary accounts suggest the IBM 704 was introduced in 1954, ultimately achieving a production run of roughly 123 units between 1955 and 1960. The machine is commonly described as the first mass-produced commercial computer to feature magnetic-core memory as a standard component, replacing the Williams-tube storage of its predecessor, the IBM 701. Those accounts give its standard 737 Magnetic Core Storage Unit as 4,096 36-bit words of memory. The conclusion is not a single triumphal date but a trajectory: by the middle of the 1950s, core had moved from MIT laboratory problem to IBM product line.

The timing of this commercialization arc was critical. By the time researchers gathered for the Dartmouth Summer Research Project on Artificial Intelligence in the summer of 1956, the von Neumann architecture’s most glaring physical vulnerability had been substantially resolved. The symbolic-AI agenda inherited a memory infrastructure that was fast, non-volatile, and scaling industrially. That did not make computers cheap, small, or easy to program. It did change the question. For the large institutional machines that symbolic AI initially used, hardware memory was no longer the primary load-bearing constraint; the next bottleneck would be the software itself (see Chapter 11).

Why this still matters today

The chapter’s two engineering ideas still organise modern computing. Coincident-current selection — addressing a single bit by the agreement of two coordinates that each carry only half the activation force — is the direct ancestor of every memory cell that distinguishes “selected” from “half-selected” by analog margin. DRAM sense amplifiers, flash memory’s threshold-voltage cells, and content-addressable lookups in network routers all descend from the same threshold-and-coincidence trick. Parallel invention with commercial resolution — the Forrester / Rajchman / Wang convergence settled by IBM’s 500,000-dollar patent purchase rather than a court ruling — is also still with us: most modern hardware patent disputes resolve through licensing rather than litigation, for the same institutional reasons that drove SAGE-era memory.

Footnotes

1. Multiple secondary sources credit An Wang and Way-Dong Woo at the Harvard Computation Laboratory with the 1949 magnetic-core invention. However, US Patent 2,708,722 names only An Wang as the inventor of record on its face-sheet. The co-inventorship remains a matter of historical dispute. ↩